Field of the Invention
The present invention relates to a structure for improving interface stress, and in particular to a plated-layer structure for improving interface stress between AlN substrate and copper-plated layer.
The Prior Arts
Presently, the most popular research for the three-dimensional (3D) integrated circuit (IC) package in the semiconductor industry is the copper filling technology for the Through-Silicon Via. In applying the Through-Silicon Via technology into the IC packaging, it has the advantages of compact size, high density, good electric conduction, low power consumption, and superior performance. Therefore, presently, it is mainly utilized in manufacturing the DRAM products. However, the electrical current the silicon material is able to sustain is rather limited, and its insulation is poor, such that an overlarge current could damage the silicon material.
In this respect, AlN has the superb characteristics of high heat conduction, high insulation, having its thermal expansion coefficient close to that of GaN, AlGaN semiconductor material. As such, AlGaN substrate may replace silicon and Sapphire substrates in the application of packaging for high power semiconductor components (IGBT, MOSFET), and high power light-emitting-diode (LED), to achieve better performance.
When the Through Silicon Via technology is used in producing AlN wafer, it is defined and referred to as TAV (Through Aluminum Nitride Via) technology. In application, vias are first formed on AlN substrate through using laser or Inductively Coupled Plasma (ICP), then the electric conduction seed layer is formed on the entire surface of the substrate and in vias by means of sputtering or chemical plating (electroless plating). Finally, the electroplating process is used to combine copper and other conductive material (for example, tungsten), to fill in TAV or on the surface of the substrate, by means of all-fill or hole wall plating, as shown in FIG. 1. In this respect, TAV is not only capable of providing electric connection, but it can also provide heat dissipation route, to raise the heat dissipation capability of the entire system.
The application of AlN substrate into high power LED packaging has the advantages of achieving system integration and high heat dissipation route of high power LED, increasing its life span, raising its light emitting efficiency and stability. However, the copper and AlN utilized in the copper via of AlN substrate can be damaged, due to mismatching of thermal expansion coefficients and the ensuing over deformation. When high power LED is used for illumination purpose in a severe environment, its reliability is questionable and is an issue of concern.
In the TAV process and the metal film plating process, the AlN substrate is subject to high process temperature, that could lead to protrusion of material filled in the hole, thus leading to reduced yield. Since via filling is realized through filling conductive material to its center through its side wall, in case the via is not fully filled to create via gap, then the overall resistance will increase to reduce the transmission efficiency for the electric signal. In case it is used in a high temperature environment, the air in the via gap tends to inflate to cause via explosion. Therefore, for the wafer thus obtained, the stress remains tends to affect adversely the reliability of the LED package in applications, such as detaching of the via-filled material from the copper wall, and adhesion of LED package with the substrate.
The manufacturing processes for the surface metal route and the via copper filling for an AlN substrate are as follows: Firstly, forming vias on AlN substrate through using Laser or Inductively Coupled Plasma (ICP). Next, forming a conductive seed layer in the vias and the entire surface of the substrate, by means of sputtering or chemical plating (electroless plating). And finally, using copper or other conductive materials (for example, tungsten) to fill in TAV or the entire surface of the substrate through electroplating, by means of filling all the through-holes or plating the entire hole wall.
In order to raise its heat dissipation capability and electric conduction efficiency, the copper layer thickness of the metal route on the surface of the ceramic substrate is increased. For the metalized ceramic substrate presently available on the market, the thickness of the copper plated layer is 50˜100 μm. The thickness of the copper plated layer can be increased further, to meet the specific requirements of the heat dissipation and electric conduction.
For a metalized AlN substrate having TAV thus obtained, pressure cooker test (PCT) (121° C./100% R.H./33 psia (2 atm), 96 hrs) and TST(−40° C.˜125° C., 200 cycles) are performed to test its reliability. The results show that cracks could occur at the edges of the copper plated layer for the AlN substrate. From a major axis maximum stress distribution obtained through Finite Element Simulation Analysis, it can be known that, in a reduced temperature, for the edges of a copper plated layer of an AlN substrate, the maximum stress for the major axis is a pulling stress. It is assumed that this pulling stress is the major cause of substrate cracks.
Therefore, presently, the design and performance of AlN substrate and surface layer thereon is not quite satisfactory, and it leaves much room for improvement.